Design of two-stage class AB CMOS buffers: a systematic approach

A systematic approach for the design of two-stage class AB CMOS unity-gain buffers is proposed. It is based on the inclusion of a class AB operation to class A Miller amplifier topologies in unity-gain negative feedback by a simple technique that does not modify quiescent currents, supply requirements, noise performance, or static power. Three design examples are fabricated in a 0.5 μm CMOS process. Measurement results show slew rate improvement factors of approximately 100 for the class AB buffers versus their class A counterparts for the same quiescent power consumption (< 200 μW)

An Op-Amp Approach for Bandpass VGAs With Constant Bandwidth

Two approaches to implement variable gain amplifiers based on Miller op-amps are discussed. One has true constant bandwidth while the other has essentially reduced bandwidth variations with varying gain. Servo-loops and ac coupling techniques with quasi floating gate transistors are used to provide a bandpass response with very low cutoff frequency in the range of hertz. In practice, one of the schemes is shown to have bandwidth variations close to a factor two while the second one has true constant bandwidth over the gain tuning range. Experimental results of test chip prototypes in 180-nm CMOS technology verify the theoretical claims